ESP32: move adc runtime reading functions to IRAM. #491
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@runger1101001 @askuric PTAL. And please let me know what is the best way to tag a PR to be reviewed. Thank you. |
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LGTM :D |
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Hey, merging the other two PRs has caused some conflicts on this one it seems... could you take a look then I can run the tests when that is fixed... Regarding the formatting changes, are you using editorconfig? I think our projects currently don't have one, maybe its a good idea to add it? |
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@runger1101001 sure, I will do a proper rebase then tag you again. Regarding the format, it is probably my editor that was not configured properly, did you consider to use clang format? It is very popular and easy to use. Thank you! |
* It will improve the execution speed. * It will prevent crashes if the chip disables the ICACHE Signed-off-by: Felipe Neves <[email protected]>
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@runger1101001 just rebased to dev, it should be good now. I will take a detailed look on next PR to avoid this formatting changes, or maybe try to check how the clang_formatter works then submit an initial PR. cc: @askuric |
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I've merged it, and thank you! |
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The intention of these changes are to improve the ADC reading execution speed, so we address it by moving all runtime ADC functions for ESP32 platform to the IRAM, since this memory is core-coupled regardless the ESP32 family there is no cache miss possibility and the latency is the lowest possible, it can save some precious microseconds.
Also this change prevents any crash to occur if the ESP32 chip to disable the ICACHE temporary, very likely to happen on dual-core chip variant like, ESP32, S3 and P4.